Lithography systems are used to expose patterns on semiconductor wafers in the fabrication of integrated circuit (IC) devices. Optical, electron (e-) beam, ion beam, and x-ray lithographic systems are examples of currently available tools. A typical system generally includes a primary exposure or radiation source, mask and substrate positioning systems, a projection system to illuminate and image the pattern present on the mask onto the substrate, and a control system. The intent is to selectively illuminate a wafer coated with a layer of radiation sensitive material to produce the desired circuit patterns, which will later be metallized or doped with impurities or otherwise activated during subsequent processing. Illumination can be by ultraviolet light, visible light, or other radiation, such as x-rays, e-beam or ion beam. Integrated circuit devices typically undergo numerous illumination steps and physical treatment steps during production. It should be noted that a single semiconductor wafer typically contains multiple IC devices. The entire wafer is processed by exposing a image field on a wafer, stepping to the next image field, and repeating the process. This method is referred to as serial lithographic processing since the many image fields of the wafer are exposed/printed serially, one by one, even though all the pixels in the image field are exposed simultaneously per exposure.
An image field may contain multiple IC devices if the device size is small as compared to the image field. Thus, a single exposure may print multiple devices since all the pixels in the image field are exposed simultaneously, and the wafer is then stepped to the next field for the imaging process to be repeated. This process includes both serial and parallel lithographic processing in the sense that circuitry for multiple IC devices are printed per exposure, but the exposure is limited to a single field for every step. The number of devices on a wafer that can be imprinted in a single step is limited by the size of the image field in this method.
A currently available maximum lens field is 20 mm by 20 mm for an optical lithographic system. Thus, if the desired device size is 20 mm by 20 mm, only one device can be exposed for each image field, while for a smaller device size, such as 1 mm by 1 mm, 400 devices can be printed in a single step. Each exposure step is a parallel operation where the entire field receives flood exposure by the light source and the imaging information from the mask is transferred directly onto the target wafer area. Thus, if the image field could be enlarged to equal the size of the target wafer, then a batch lithographic process could be realized, wherein the entire wafer is exposed in one step. However, the lens technology is highly advanced, and it is not expected that current technology will produce fields significantly larger than those available today. On the other hand, wafer diameters are expected to grow as that technology improves, which means that batch lithographic processing will not be a viable solution.
Additionally, the current trend is for the individual bits on IC devices to have half-micron and quarter-micron dimensions, with the push for even smaller dimensions. This means that lithographic equipment used for imaging these patterns necessarily require higher and higher resolutions which could lead to use of technologies other than optical lithographic systems. Simultaneously, the actual physical sizes of the IC devices are increasing due to more integrated operations on a single device. The increased IC chip sizes is one driving force that is pushing the semiconductor industry to move toward larger sized wafers, beyond the 6-inch (150 mm) and 8-inch (200 mm) wafers that have been the norm up to now. However, with larger sized wafers, more serial imaging steps are required to pattern the entire wafer as compared to the smaller sized wafers due to the increased surface area of the wafer. For example, the increased process time required for larger wafers is proportional to wafer area, so that it takes approximately 2.5 times longer to expose an 8-inch wafer as compared to a 5-inch wafer. This ratio increases with increasing wafer diameters, which is undesirable since industry is in the process of developing 12-inch, 16-inch, and 20-inch wafer technologies. Keeping in mind that a finished IC device may comprise 20 or more layers that have to be lithographically imaged, any reduction in lithographic cycle time can significantly decrease the processing costs of the wafers especially as volume production increases.
E-beam and ion beam lithography have addressed this problem with the use of multiple fields in order to decrease the cycle time. However, the methods of forming the multiple fields in these technologies require means for breaking up charged particle beams in a parallel manner through the use of electric fields and then focusing these beams onto the semiconductor wafer. This technology is wholly inapplicable with x-ray lithography which uses photon beams and physical mirrors for bending and reflecting light. Yet, heavy emphasis is being placed on developing x-ray lithography for the processing of newer more complex IC devices due to the high resolution achievable with x-ray wavelengths. Thus, it is desirable to find a method for reducing lithographic cycle time using x-ray lithography.